The present invention relates to a method for production of active matrix display substrates using thin film transistors (TFT) and more particularly to a method for production of substrates for liquid-crystal display use.
As the display using active matrix type display substrates using thin film transistors provide picture quality higher than the simple matrix type display apparatus does, it is actively studied. The active matrix type display apparatus is shown in construction in FIG. 1. It is composed of a source (or drain) electrode bus 21 and a gate electrode bus 22 formed on a light transmission base plate 20, a thin film transistor 23, a display substrate 25 supporting a picture-element electrode 24, an opposite substrate 27 having an opposite electrode 26 with the liquid crystal being sealed in between the substrates 25 and 27. The active matrix type display substrate using such thin film transistors have more processes than the simple matrix type display apparatus has, thus resulting in higher price. A method of decreasing the processes is proposed. A method of reducing the mask operations into two levels is disclosed in, for example, Japanese Patent Application Laid-Open publication (Tokkaisho) No. 59-501562. The thin film transistor of this method is a staggered type of forming the insulator on the semiconductor, thus making it difficult to provide the thin film transistor of good quality.
On the other hand, the inverted staggered thin film transistor for forming the semiconductor on the insulator provides the thin film transistors of good quality, but requires five levels of mask operation for the production of the matrix display substrates. This method will be described with reference to FIG. 2. The thin film transistor is composed of a Cr gate 31 piled up on the insulating substrate 30, a SiNx insulating layer 32, an a Si (amorphous silicon) layer 34, an Al source 35, an Al drain 36. The picture element electrode 38 is made of the ITO (Indium-Tin-Oxide) which is a transparent conductive layer. The thin film transistor and the picture-element electrode 38 are combined with the drain 36 connected with the contact hole 42 formed in the insulation layer 32. The formation of this construction requires the following pattern forming process.
(1) The ITO is selectively etched to form the picture-element electrode. PA1 (2) The gate metal is selectively etched to form the gate-electrode bus 31. PA1 (3) The insulation layer 32 is formed to have a window portion 42 in the insulation layer 32 (a gate electrode bus take-out portion of the peripheral portion is also formed). PA1 (4) The a Si semiconductor is formed and is selectively etched to provide the a Si layer 34 of the island-shaped pattern. PA1 (5) The source drain metal is selectively etched to form the drain 36 connected with the picture-element electrode 38 through the source electrode bus 35 and the contact hole 42.
This method requires five photomasks. The above described producing method does not form the n.sup.+ - a Si layer doped for setting up an ohmic relation between the source drain electrodes 35, 36 and the .alpha.- Si semiconductor layer 34. In order to provide a process of piling up this n.sup.+ - a Si layer, a process is required of forming a channel protective layer in advance (between the (2) and the (3) of the above-described pattern process) on the a Si layer so that the n.sup.+ - a Si layer is removed in the pattern of the source drain and the a Si 34 of the semiconductor layer is not etched. In this case, six masks are required.
In order to provide the active matrix display substrate using the inverted, staggered good-quality TFT which piles up the semiconductor layer after the insulating layer has been piled up as described hereinabove, five or six masks are required and many processes are provided.